Presentation of the article ’Dynamic Reconfiguration of Deep Neural Networks for Resource-Constrained FPGA Edge Accelerators’ at the ’Excellence in Artificial Intelligence and Edge Computing’ workshop of the HIPEAC 2025 conference
Date: 20 January 2025
Event: CETIC talks ⊕
Expertises:
Scalability of embedded systems and IoT networks ⊕
About project: dAIEDGE ⊕
HiPEAC is a network of around 2,000 world-class computing systems researchers, industry representatives and students. Areas of focus and integration include safety-critical dependencies, cybersecurity, energy efficiency and machine learning.
The HiPEAC 2025 conference took place in Barcelona, Spain. Associated workshops, tutorials, special sessions, several large poster session and an industrial exhibition run in parallel with the conference.
CETIC participated to the Excellence in Artificial Intelligence and Edge Computing workshop organized and supported by the dAIEdge European Network of Excellence on “AI at the Edge”. CETIC and DFKI presented the article they wrote together, "Dynamic Reconfiguration of Deep Neural Networks for Resource-Constrained FPGA Edge Accelerators".
This article presents a solution to address the challenges of implementing Edge AI computing on SoC FPGAs. This solution combines orchestration technics from CETIC and the DeepEdgeSoC DNN design framework from DFKI.
Orchestration consists of switching DNNs by reprogramming the logic according to the operational step of the application running on the processor. DMWay, CETIC’s middleware for building Edge Computing application, offers tasks orchestration among others features. DMWay makes it possible to implement it simply, through configuration