This project aims to provide a methodology allowing SME to adapt their software, designed to run on monocore processor, to allow them to run on multicore processors, on GPU or on FPGA based accelerator platforms in order to benefit easily and quickly of the computing power of these architectures.
Factsheet:
The increase of the algorithm complexity and the amount of data handled by IT system in various economical domains make enterprises increase their computing power. At the same time, processor vendors are hindered in their quest for better performances by physical limitations and since a few years the available power per core is not increasing anymore. Faced with these limitations, vendors are now providing multi-core CPU and multiprocessors architectures. In parallel with this evolution, graphic cards have increased their processing power dramatically thanks to the multiplication of processing units inside GPU. FGPA based accelerators have increased their computing power and the range of their features. Originally requiring dedicated expertise in HDL, new productivity tools easing development and interfacing have been made available.
Unfortunately most, existing software are not able to benefit immediately from parallel execution. As technological breakthroughs happened the last three years, there is no widespread migration towards these new platforms, mainly because of the lack of established standards and easy to use methodologies.
This project aims to provide a methodology allowing to adapt existing software to allow them to run on multicore processors, on GPU or on FPGA based accelerator platforms in order to benefit easily and quickly of the computing power of these architectures.
Following a first state of the art and specification phase, the project shall develop a methodology allowing SME to adapt their software to parallel platforms. This will be supported by a set of tools, in order to ease design of parallel software on GPU and to facilitate the migration of the most critical part of a software to a FPGA.
This methodology is then applied on actual industrial use cases in order to validate the approach chosen and improve the tools and the methodology thanks to the return of experience given by the output of these use cases.
After the end of the validation phase, a promotion phase shall take place to allow as many Walloon SME as possible to benefit from the developed methodology and tools. Along with the methodology and the use cases, the additional documentation and the source code of the developed tools shall be part of the output of the project.
In order to answer the needs of the SME, the project shall take into account the actual environment in which the selected applications are used. Some companies have set up large computing centre, therefore their focus shall be on an optimization of their assets in terms of efficiency without obsoleting their past investments. These companies are also concerned by the space used and the electrical consumption. SME usually have much more limited computing capabilities. They will be more interested to increase their computing capability inexpensively by adding one or more mainstream GPU cards, or by adding an FPGA based accelerator card, more expensive, but providing a greater potential of processing capabilities increase.
SME will benefit from additional computing resources but also will be more able to use them as the tools provided with the methodology should facilitate the development.
Enterprises having a number of computers fitted with powerful graphic cards could be interested to use this processing power thanks to a network computing middleware allowing the use of the processing capabilities of the computers during the night.
